Model { Name "inverting_amp" Version 7.7 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.6" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "windows-1252" SaveDefaultBlockParams on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" DataTypeOverrideAppliesTo "AllNumericTypes" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" MaxMDLFileLineLength 120 UserBdParams "PhysicalModelingChecksum;PhysicalModelingParameterChecksum;PhysicalModelingProducts" PhysicalModelingChecksum "1933572861" PhysicalModelingParameterChecksum "1955540156" PhysicalModelingProducts "SimElectronics|Simscape" Created "Wed Oct 05 09:59:18 2011" Creator "Werth" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "Werth" ModifiedDateFormat "%" LastModifiedDate "Sat Oct 15 17:03:23 2011" RTWModifiedTimeStamp 240598983 ModelVersionFormat "1.%" ConfigurationManager "None" SampleTimeColors off SampleTimeAnnotations off LibraryLinkDisplay "none" WideLines off ShowLineDimensions off ShowPortDataTypes off ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowSignalResolutionIcons on ShowViewerIcons on SortedOrder off ExecutionContextIcon off ShowLinearizationAnnotations on BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" TryForcingSFcnDF off Object { $PropName "DataLoggingOverride" $ObjectID 1 $ClassName "Simulink.SimulationData.ModelLoggingInfo" model_ "inverting_amp" signals_ [] overrideMode_ [0.0] Array { Type "Cell" Dimension 1 Cell "inverting_amp" PropName "logAsSpecifiedByModels_" } Array { Type "Cell" Dimension 1 Cell [] PropName "logAsSpecifiedByModelsSSIDs_" } } RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on CovForceBlockReductionOff on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on CovModelRefEnable "Off" CovExternalEMLEnable off ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 2 Version "1.11.0" Array { Type "Handle" Dimension 9 Simulink.SolverCC { $ObjectID 3 Version "1.11.0" StartTime "0.0" StopTime "10" AbsTol "auto" FixedStep "auto" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ZcThreshold "auto" ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "1e-2" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "Auto" ConcurrentTasks off Solver "ode45" SolverName "ode45" SolverJacobianMethodControl "auto" ShapePreserveControl "DisableAll" ZeroCrossControl "UseLocalSettings" ZeroCrossAlgorithm "Nonadaptive" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" InsertRTBMode "Whenever possible" } Simulink.DataIOCC { $ObjectID 4 Version "1.11.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveCompleteFinalSimState off SaveFormat "Array" SignalLoggingSaveFormat "ModelDataLogs" SaveOutput on SaveState off SignalLogging on DSMLogging on InspectSignalLogs off SaveTime on ReturnWorkspaceOutputs off StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" DSMLoggingName "dsmout" OutputOption "RefineOutputTimes" OutputTimes "[]" ReturnWorkspaceOutputsName "out" Refine "1" } Simulink.OptimizationCC { $ObjectID 5 Version "1.11.0" Array { Type "Cell" Dimension 8 Cell "BooleansAsBitfields" Cell "PassReuseOutputArgsAs" Cell "PassReuseOutputArgsThreshold" Cell "ZeroExternalMemoryAtStartup" Cell "ZeroInternalMemoryAtStartup" Cell "OptimizeModelRefInitCode" Cell "NoFixptDivByZeroProtection" Cell "UseSpecifiedMinMax" PropName "DisabledProps" } BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off UseIntDivNetSlope off UseSpecifiedMinMax off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnhancedBackFolding off StrengthReduction off ExpressionFolding on BooleansAsBitfields off BitfieldContainerType "uint_T" EnableMemcpy on MemcpyThreshold 64 PassReuseOutputArgsAs "Structure reference" ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero off NoFixptDivByZeroProtection off EfficientFloat2IntCast off EfficientMapNaN2IntZero on OptimizeModelRefInitCode off LifeSpan "inf" MaxStackSize "Inherit from target" BufferReusableBoundary on SimCompilerOptimization "Off" AccelVerboseBuild off AccelParallelForEachSubsystem on } Simulink.DebuggingCC { $ObjectID 6 Version "1.11.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" SignalRangeChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" SaveWithDisabledLinksMsg "warning" SaveWithParameterizedLinksMsg "warning" CheckSSInitialOutputMsg on UnderspecifiedInitializationDetection "Classic" MergeDetectMultiDrivingBlocksExec "none" CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" MaskedZcDiagnostic "warning" IgnoredZcDiagnostic "warning" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" FixptConstUnderflowMsg "none" FixptConstOverflowMsg "none" FixptConstPrecisionLossMsg "none" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceMultiInstanceNormalModeStructChecksumCheck "error" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" SimStateInterfaceChecksumMismatchMsg "warning" SimStateOlderReleaseMsg "error" InitInArrayFormatMsg "warning" StrictBusMsg "ErrorLevel1" BusNameAdapt "WarnAndRepair" NonBusSignalsTreatedAsBus "none" LoggingUnavailableSignals "error" BlockIODiagnostic "none" SFUnusedDataAndEventsDiag "warning" SFUnexpectedBacktrackingDiag "warning" SFInvalidInputDataAccessInChartInitDiag "warning" SFNoUnconditionalDefaultTransitionDiag "warning" SFTransitionOutsideNaturalParentDiag "warning" } Simulink.HardwareCC { $ObjectID 7 Version "1.11.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 32 ProdBitPerLong 32 ProdBitPerFloat 32 ProdBitPerDouble 64 ProdBitPerPointer 32 ProdLargestAtomicInteger "Char" ProdLargestAtomicFloat "None" ProdIntDivRoundTo "Undefined" ProdEndianess "Unspecified" ProdWordSize 32 ProdShiftRightIntArith on ProdHWDeviceType "32-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetBitPerFloat 32 TargetBitPerDouble 64 TargetBitPerPointer 32 TargetLargestAtomicInteger "Char" TargetLargestAtomicFloat "None" TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "Specified" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 8 Version "1.11.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" EnableParallelModelReferenceBuilds off ParallelModelReferenceErrorOnInvalidPool on ParallelModelReferenceMATLABWorkerInit "None" ModelReferenceNumInstancesAllowed "Multi" PropagateVarSize "Infer from blocks in model" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off PropagateSignalLabelsOutOfModel off SupportModelReferenceSimTargetCustomCode off } Simulink.SFSimCC { $ObjectID 9 Version "1.11.0" SFSimEnableDebug on SFSimOverflowDetection on SFSimEcho on SimBlas on SimCtrlC on SimExtrinsic on SimIntegrity on SimUseLocalCustomCode off SimParseCustomCode on SimBuildMode "sf_incremental_build" } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 10 Version "1.11.0" Array { Type "Cell" Dimension 8 Cell "IncludeHyperlinkInReport" Cell "GenerateTraceInfo" Cell "GenerateTraceReport" Cell "GenerateTraceReportSl" Cell "GenerateTraceReportSf" Cell "GenerateTraceReportEml" Cell "GenerateSLWebview" Cell "GenerateCodeMetricsReport" PropName "DisabledProps" } SystemTargetFile "grt.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "grt_default_tmf" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ConfigAtBuild off RTWUseLocalCustomCode off RTWUseSimCustomCode off IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off GenerateTraceInfo off GenerateTraceReport off GenerateTraceReportSl off GenerateTraceReportSf off GenerateTraceReportEml off GenerateCodeInfo off GenerateSLWebview off GenerateCodeMetricsReport off RTWCompilerOptimization "Off" CheckMdlBeforeBuild "Off" CustomRebuildMode "OnUpdate" Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 11 Version "1.11.0" Array { Type "Cell" Dimension 21 Cell "IgnoreCustomStorageClasses" Cell "IgnoreTestpoints" Cell "InsertBlockDesc" Cell "InsertPolySpaceComments" Cell "SFDataObjDesc" Cell "MATLABFcnDesc" Cell "SimulinkDataObjDesc" Cell "DefineNamingRule" Cell "SignalNamingRule" Cell "ParamNamingRule" Cell "InlinedPrmAccess" Cell "CustomSymbolStr" Cell "CustomSymbolStrGlobalVar" Cell "CustomSymbolStrType" Cell "CustomSymbolStrField" Cell "CustomSymbolStrFcn" Cell "CustomSymbolStrFcnArg" Cell "CustomSymbolStrBlkIO" Cell "CustomSymbolStrTmpVar" Cell "CustomSymbolStrMacro" Cell "ReqsInCode" PropName "DisabledProps" } ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses on IgnoreTestpoints off IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off MATLABFcnDesc off IncDataTypeInIds off MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrFcnArg "rt$I$N$M" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off InsertPolySpaceComments off SimulinkBlockComments on MATLABSourceComments off EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off UseSimReservedNames off } Simulink.GRTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 12 Version "1.11.0" Array { Type "Cell" Dimension 16 Cell "GeneratePreprocessorConditionals" Cell "IncludeMdlTerminateFcn" Cell "CombineOutputUpdateFcns" Cell "SuppressErrorStatus" Cell "ERTCustomFileBanners" Cell "GenerateSampleERTMain" Cell "GenerateTestInterfaces" Cell "ModelStepFunctionPrototypeControlCompliant" Cell "CPPClassGenCompliant" Cell "MultiInstanceERTCode" Cell "PurelyIntegerCode" Cell "SupportComplex" Cell "SupportAbsoluteTime" Cell "SupportContinuousTime" Cell "SupportNonInlinedSFcns" Cell "PortableWordSizes" PropName "DisabledProps" } TargetFcnLib "ansi_tfl_table_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" TargetFunctionLibrary "ANSI_C" UtilityFuncGeneration "Auto" ERTMultiwordTypeDef "System defined" FunctionExecutionProfile off CodeExecutionProfiling off ERTCodeCoverageTool "None" ERTMultiwordLength 256 MultiwordLength 2048 GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant on ParMdlRefBuildCompliant on CompOptLevelCompliant on IncludeMdlTerminateFcn on GeneratePreprocessorConditionals "Disable all" CombineOutputUpdateFcns off CombineSignalStateStructs off SuppressErrorStatus off ERTFirstTimeCompliant off IncludeFileDelimiter "Auto" ERTCustomFileBanners off SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging on MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime on SupportNonInlinedSFcns on SupportVariableSizeSignals off EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off CPPClassGenCompliant off AutosarCompliant off UseMalloc off ExtMode off ExtModeStaticAlloc off ExtModeTesting off ExtModeStaticAllocSize 1000000 ExtModeTransport 0 ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off RTWCAPIRootIO off GenerateASAP2 off } PropName "Components" } } SSC.SimscapeCC { $ObjectID 13 Version "1.0" Array { Type "Cell" Dimension 1 Cell "Name" PropName "DisabledProps" } Name "Simscape" EditingMode "Full" ExplicitSolverDiagnosticOptions "warning" InputDerivativeDiagnosticOptions "warning" GlobalZcOffDiagnosticOptions "warning" SimscapeLogType "none" SimscapeLogName "simlog" SimscapeLogDecimation 1 SimscapeLogLimitData on SimscapeLogDataHistory 5000 } PropName "Components" } Name "Configuration" CurrentDlgPage "Solver" ConfigPrmDlgPosition [ 243, 69, 1123, 699 ] } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 2 } BlockDefaults { ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on BlockRotation 0 BlockMirror off } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Helvetica" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Helvetica" FontSize 9 FontWeight "normal" FontAngle "normal" } BlockParameterDefaults { Block { BlockType Scope ModelBased off TickLabels "OneTimeTick" ZoomMode "on" Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "-1" } } System { Name "inverting_amp" Location [2, 82, 1348, 715] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" ReportName "simulink-default.rpt" SIDHighWatermark "35" Block { BlockType Reference Name "DC Voltage Source" SID "5" Ports [0, 0, 0, 0, 0, 1, 1] Position [246, 360, 274, 400] BlockRotation 270 BlockMirror on BackgroundColor "orange" LibraryVersion "1.1" SourceBlock "fl_lib/Electrical/Electrical Sources/DC Voltage Source" SourceType "DC Voltage Source" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off ComponentPath "foundation.electrical.sources.dc_voltage" ClassName "dc_voltage" SchemaVersion "1" v0 "1" v0_unit "V" i_Log "off" v_Log "off" LocalVarNames "|i|v" LocalVarDescs "|i|v" LocalVarLogging "[0 0]" } Block { BlockType Reference Name "Electrical Reference" SID "7" Ports [0, 0, 0, 0, 0, 1] Position [240, 475, 280, 515] BlockRotation 270 BlockMirror on BackgroundColor "orange" LibraryVersion "1.1" SourceBlock "fl_lib/Electrical/Electrical Elements/Electrical Reference" SourceType "Electrical Reference" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off ComponentPath "foundation.electrical.elements.reference" ClassName "reference" SchemaVersion "1" i_Log "off" LocalVarNames "|i" LocalVarDescs "|i" LocalVarLogging "0" } Block { BlockType Reference Name "Electrical Reference1" SID "11" Ports [0, 0, 0, 0, 0, 1] Position [355, 440, 395, 480] BlockRotation 270 BlockMirror on BackgroundColor "orange" LibraryVersion "1.1" SourceBlock "fl_lib/Electrical/Electrical Elements/Electrical Reference" SourceType "Electrical Reference" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off ComponentPath "foundation.electrical.elements.reference" ClassName "reference" SchemaVersion "1" i_Log "off" LocalVarNames "|i" LocalVarDescs "|i" LocalVarLogging "0" } Block { BlockType Reference Name "Electrical Reference2" SID "14" Ports [0, 0, 0, 0, 0, 1] Position [585, 470, 625, 510] BlockRotation 270 BlockMirror on BackgroundColor "orange" LibraryVersion "1.1" SourceBlock "fl_lib/Electrical/Electrical Elements/Electrical Reference" SourceType "Electrical Reference" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off ComponentPath "foundation.electrical.elements.reference" ClassName "reference" SchemaVersion "1" i_Log "off" LocalVarNames "|i" LocalVarDescs "|i" LocalVarLogging "0" } Block { BlockType Reference Name "Finite Gain Op-Amp2" SID "35" Ports [0, 0, 0, 0, 0, 2, 1] Position [395, 314, 530, 401] BlockRotation 180 BlockMirror on BackgroundColor "orange" LibraryVersion "1.1" SourceBlock "elec_lib/Integrated Circuits/Finite Gain Op-Amp" SourceType "Finite Gain Op-Amp" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off ComponentPath "elec.integrated_circuits.finitegain_opamp" ClassName "finitegain_opamp" SchemaVersion "1" A "1e8" A_unit "1" Rin "1e+8" Rin_unit "Ohm" Rout "1e-4" Rout_unit "Ohm" Vmin "-12" Vmin_unit "V" Vmax "12" Vmax_unit "V" LocalVarLogging "[]" } Block { BlockType Reference Name "PS-Simulink\nConverter" SID "12" Ports [0, 1, 0, 0, 0, 1] Position [655, 420, 685, 450] BackgroundColor "lightBlue" LibraryVersion "1.1" SourceBlock "nesl_utility/PS-Simulink\nConverter" SourceType "PS-Simulink\nConverter" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off PhysicalDomain "network_engine_domain" LeftPortType "input" RightPortType "output" SubClassName "ps_output" Unit "1" AffineConversion off } Block { BlockType Reference Name "Resistor1" SID "9" Ports [0, 0, 0, 0, 0, 1, 1] Position [305, 321, 345, 349] BackgroundColor "orange" LibraryVersion "1.1" SourceBlock "fl_lib/Electrical/Electrical Elements/Resistor" SourceType "Resistor" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off ComponentPath "foundation.electrical.elements.resistor" ClassName "resistor" SchemaVersion "1" R "1" R_unit "Ohm" i_Log "off" v_Log "off" LocalVarNames "|i|v" LocalVarDescs "|i|v" LocalVarLogging "[0 0]" } Block { BlockType Reference Name "Resistor2" SID "10" Ports [0, 0, 0, 0, 0, 1, 1] Position [425, 251, 465, 279] BackgroundColor "orange" LibraryVersion "1.1" SourceBlock "fl_lib/Electrical/Electrical Elements/Resistor" SourceType "Resistor" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off ComponentPath "foundation.electrical.elements.resistor" ClassName "resistor" SchemaVersion "1" R "5" R_unit "Ohm" i_Log "off" v_Log "off" LocalVarNames "|i|v" LocalVarDescs "|i|v" LocalVarLogging "[0 0]" } Block { BlockType Scope Name "Scope" SID "15" Ports [1] Position [725, 419, 755, 451] BackgroundColor "green" Floating off Location [188, 390, 512, 629] Open off NumInputPorts "1" List { ListType AxesTitles axes1 "%" } YMax "-5" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Reference Name "Solver\nConfiguration" SID "6" Ports [0, 0, 0, 0, 0, 0, 1] Position [170, 424, 215, 456] BackgroundColor "lightBlue" LibraryVersion "1.1" SourceBlock "nesl_utility/Solver\nConfiguration" SourceType "Solver\nConfiguration" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off PhysicalDomain "network_engine_domain" LeftPortType "input" RightPortType "generic" SubClassName "solver" Accelerate off Profile off ResidualTolerance "1e-9" MaxNonlinIter "3" MaxModeIter "2" DoFixedCost off UseLocalSampling off DoDC off LinearAlgebra "Sparse" LocalSolverSampleTime ".001" LocalSolverChoice "NE_BACKWARD_EULER_ADVANCER" UseLocalSolver off } Block { BlockType Reference Name "Voltage Sensor" SID "13" Ports [0, 0, 0, 0, 0, 1, 2] Position [575, 375, 615, 415] BlockRotation 270 BlockMirror on BackgroundColor "lightBlue" LibraryVersion "1.1" SourceBlock "fl_lib/Electrical/Electrical Sensors/Voltage Sensor" SourceType "Voltage Sensor" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" GeneratePreprocessorConditionals off ComponentPath "foundation.electrical.sensors.voltage" ClassName "voltage" SchemaVersion "1" i1_Log "off" v1_Log "off" LocalVarNames "|i1|v1" LocalVarDescs "|i1|v1" LocalVarLogging "[0 0]" } Line { LineType "Connection" SrcBlock "Solver\nConfiguration" SrcPort RConn1 Points [30, 0] Branch { ConnectType "DEST_SRC" DstBlock "Electrical Reference" DstPort LConn1 } Branch { ConnectType "DEST_DEST" SrcBlock "DC Voltage Source" SrcPort RConn1 Points [0, 25] } } Line { LineType "Connection" SrcBlock "Voltage Sensor" SrcPort RConn2 DstBlock "Electrical Reference2" DstPort LConn1 } Line { LineType "Connection" SrcBlock "Voltage Sensor" SrcPort RConn1 Points [0, 5] DstBlock "PS-Simulink\nConverter" DstPort LConn1 } Line { SrcBlock "PS-Simulink\nConverter" SrcPort 1 DstBlock "Scope" DstPort 1 } Line { LineType "Connection" Points [370, 335; 10, 0] DstBlock "Finite Gain Op-Amp2" DstPort LConn2 Branch { ConnectType "SRC_DEST" SrcBlock "Resistor2" SrcPort LConn1 Points [-40, 0; 0, 70] } Branch { ConnectType "SRC_DEST" SrcBlock "Resistor1" SrcPort RConn1 Points [10, 0] } } Line { LineType "Connection" Points [555, 360; -10, 0] DstBlock "Finite Gain Op-Amp2" DstPort RConn1 Branch { ConnectType "SRC_DEST" SrcBlock "Voltage Sensor" SrcPort LConn1 Points [-40, 0] } Branch { ConnectType "SRC_DEST" SrcBlock "Resistor2" SrcPort RConn1 Points [75, 0; 0, 95] } } Line { LineType "Connection" SrcBlock "Finite Gain Op-Amp2" SrcPort LConn1 Points [-5, 0] DstBlock "Electrical Reference1" DstPort LConn1 } Line { LineType "Connection" SrcBlock "DC Voltage Source" SrcPort LConn1 Points [0, -10] DstBlock "Resistor1" DstPort LConn1 } } }